Phase-locked loops and frequency synthesis devices using phase-locked loops are widespread throughout the electronic industry. In general, a phase-locked synthesis device has the following portions:
An optional input divider that receives a reference signal and gives a divided reference;
A phase detector that provides a difference signal between the divided reference and a feedback signal;
A low-pass filter on an output of the phase detector;
A voltage or current-controlled oscillator (VCO) controlled by output of the low-pass filter; and
An optional feedback divider that divides an output of the oscillator to provide the feedback signal.
When a phase-locked loop is locked, the divided reference and feedback signal remain in a constant relationship at the phase detector, when the loop is not locked the divided reference and feedback signal may slip past each other, such that the phase detector provides a varying output that, for some offsets of frequency and phase, tends to bring the oscillator to a frequency where the two will match.
Capture time is a time required, given a particular initial discrepancy between feedback signal and divided reference signal, to bring the divided reference and feedback signals into the stable relationship of lock. An issue with most phase-locked circuits is the capture time can be long, particularly when the divided reference and feedback signals are initially far apart. Further, when the low-pass filter has a low bandwidth, as is sometimes desirable to reduce phase noise in the oscillator output, the loop may fail to lock if the initial divided reference and feedback signal frequencies are too far apart. Long capture time is undesirable, particularly in such applications as frequency-hopping radios.
It is expected that if the feedback and divided reference frequencies are close to each other, and low-pass filter output that controls the oscillator is initialized to a value close to the value it will have during lock, and thus the oscillator frequency is initialized to a value close to a locked frequency, the capture time can be minimized.